Battery-powered extended reality (XR) devices need to sense and analyze their environments within the response time of the human senses to provide instant visual and aural feedback towards the user. And do so with extremely low power consumption and with ultra-low latency. The easics solution meets these demands with their compact nearbAI semiconductor IP cores and its unique L3-Optimizer technology for low power + low latency + low area balance. The digital IP cores are optimized for integration in ASICs, ASSPs and SoCs inside XR devices and available as of today.
The growth of edge computing and edge AI is driving the need for high-performance neural network inference engines on edge devices. Gartner projects that by 2027, deep learning will be included in over 65% of edge use cases. XR edge devices in the form of virtual reality (VR) headsets and augmented reality (AR) glasses are forecasted to experience double-digit growth and surpass 50 million units by 2026, according to IDC. XR devices will increasingly employ edge AI to locally sense and analyze their environments, as part of the distributed computing landscape of the metaverse.
nearbAI IP cores are highly efficient neural network inference engines, configurable for an extensive and growing range of AI models and use cases optimized for energy consumption, performance and area. nearbAI powers functions such as scene segmentation and reconstruction, object and face detection and recognition, foundational to consumer and enterprise XR applications.
“nearbAI is unique, delivering best-in-class extreme edge AI inference solutions for XR devices. It builds on more than three decades of DSP and image sensor chip design. Our mission is to provide customers with IPs that perfectly fit their specifications, offer outstanding performance, and are seamless to integrate right through to tape-out”, said Ramses Valvekens, CSO & Managing Director at easics.
Ideal for mobile XR processor chips and even fits in the most compact near-sensor AI chips:
Extreme optimization
- Proprietary L3-Optimizer: low power + low latency + low area balance
- Scaled and tuned to the application, yet field upgradable
- Record-breaking MAC utilization up to 95%
- Wide-ranging configurable number of MACs: 16 to 4096
- Configurable MAC accuracy, independent coefficient and data quantization, 4 to 16-bit, single bit granularity
- Configurable internal memory bank sizes and bus widths
Low power
- As low as sub 10 milliwatt
Ultra-fast response time
- Face detection in 2 milliseconds
Zero-latency switching
- Continuous multiplexing between multiple neural networks on the same nearbAI core, saving silicon area
Support for any sensor
- RGB, ToF, NIR, thermal IR, LiDAR, hyperspectral, stereo, ultrasound, audio
“easics is committed to bringing the most advanced technology and solutions to market. With nearbAI, along with our partners and customers, we are pushing the latest AI innovation to the extreme edge”, added Mr. Valvekens.
To learn more about nearbAI for XR devices and experience a live demo, visit the easics booth at Augmented Enterprise Summit (AES) 2022 in San Diego, October 18-20, Booth 802 (www.augmentedenterprisesummit.com), or visit www.nearbai.com.
About easics
easics is a market leader in digital chip design and semiconductor IP licensing. With over 30 years of design excellence in embedded solutions, easics provide unique competence and development platforms that leads to first-time right, reliable and optimized logic. easics supports leading OEMs and semiconductor companies with custom designs and customizable IP blocks for smart embedded processing systems that can be realized in custom ASICs / ASSPs / SoCs and in FPGAs.
For more information, please visit www.easics.com or follow easics on LinkedIn.
MEDIA CONTACT:
easics:
Jon Jacobsen
Marketing Manager
E: marketing@easics.com
P: +32 16 395 611
Web: www.easics.com
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